For example, Patent Document 1 describes a technology which suppresses the occurrence of a short circuit across adjacent pixels by wraparound light of backside exposure when forming pixel electrodes by self-alignment of backside exposure using a wiring as a mask. For example, Patent Document 2 discloses a technology which deposits a channel protection film formation film, and forms an organic insulating film on the channel protection film formation film by backside exposure using a gate electrode as a mask. For example, Patent Document 3 discloses a technology in which, using a lower electrode as a photo mask, a lyophilic region having generally the same pattern as that of the lower electrode and a lyophilic region having a pattern which is generally the inversion of the lower electrode pattern are formed on an insulating film, and a conductive ink is applied to the lyophilic region and baked. An upper electrode having a pattern which is generally the inversion of the lower electrode pattern is formed in a self-alignment manner in the region to which the conductive ink is applied.
[Patent Document 1] Japanese Unexamined Patent Publication No. 2003-84305
[Patent Document 2] Japanese Unexamined Patent Publication No. 09-186335
[Patent Document 3] WO 2005/024956
A drive current of a thin film transistor is increased in inverse proportion to a channel length. Consequently, a request to shorten the channel length is strong. When the portion between a source and a drain of the thin film transistor is microfabricated by using, e.g., an expensive stepper aligner, the channel length of the thin film transistor can be shortened. However, the use of the expensive stepper aligner leads to an increase in manufacturing cost.
On the other hand, the use of an inexpensive contact aligner or proximity aligner can suppress the manufacturing cost. However, since the processing accuracy by the inexpensive aligner is at most about 5 to 10 μm, it is not possible to respond to the request to shorten the channel length. A technology for implementing microfabrication of the portion between electrodes such as source and drain electrodes or between wirings with suppressed manufacturing cost is desired.